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Jul 28, 2010
Synopsys First to Deliver High-Performance Audio IP in 40-nm and 55-nm Process Technologies
Low Power, Compact and Highly Modular DesignWare 96 dB Hi-Fi Audio IP Enables Easy Integration into a Broad Range of SoC Applications
Jul 27, 2010
Synopsys' Design Compiler Graphical Shortens Design Schedule at Oticon
Early Removal of Routing Congestion Essential to Meeting Time-to-Market and Area Goals for Next Generation Hearing-Aid DSP Chipset
Jul 26, 2010
Foveon Switches to Galaxy Custom Designer Solution to Accelerate Time-to-Tapeout
Synopsys Galaxy Custom Designer Enables First-pass Silicon Success on Foveon's Advanced Digital Sensor Product
Jul 21, 2010
Synopsys and Virage Logic Announce Expiration of Hart-Scott-Rodino Waiting Period for Proposed Acquisition
Jul 13, 2010
SVTC Technologies Selects Synopsys' Manufacturing Tools to Accelerate Time to Commercialization
Comprehensive Tool Suite Addresses Needs of Innovative CMOS, MEMS and Photovoltaic Technologies
Jul 07, 2010
Open-Silicon Integrates 50 DesignWare Interface and Analog IP Products with 100 Percent Silicon Success
High-Quality, Fully Verified IP and Longstanding Relationship Between the Two Companies Accelerates Time-to-Market for Open-Silicon's Customers
Jun 23, 2010
Media Advisory/Alert: Synopsys Demonstrates Interoperability of DesignWare IP for PCI Express 3.0 at PCI-SIG Developers Conference
Jun 16, 2010
Synopsys Honors IEEE-ISTO with Tenth Annual Tenzing Norgay Interoperability Achievement Award
IEEE-ISTO recognized for Driving Market Acceptance of Industry Standards
Jun 15, 2010
Synopsys CFO Brian Beattie to Speak at NASDAQ OMX 24th Investor Program
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News
Synopsys First to Deliver High-Performance Audio IP in 40-nm and 55-nm Process Technologies
Synopsys' Design Compiler Graphical Shortens Design Schedule at Oticon
Foveon Switches to Galaxy Custom Designer Solution to Accelerate Time-to-Tapeout
Synopsys and Virage Logic Announce Expiration of Hart-Scott-Rodino Waiting Period for Proposed Acquisition
SVTC Technologies Selects Synopsys' Manufacturing Tools to Accelerate Time to Commercialization
Open-Silicon Integrates 50 DesignWare Interface and Analog IP Products with 100 Percent Silicon Success
Media Advisory/Alert: Synopsys Demonstrates Interoperability of DesignWare IP for PCI Express 3.0 at PCI-SIG Developers Conference
Synopsys Honors IEEE-ISTO with Tenth Annual Tenzing Norgay Interoperability Achievement Award
Synopsys CFO Brian Beattie to Speak at NASDAQ OMX 24th Investor Program
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Blogs
Low Power Blog: Magic Blue Smoke
A View from the Top: A System-Level Blog
Analog Insights Blog: Analog/Mixed-Signal Design and Verification
On Verification: A Software-to-Silicon Verification Blog
Standards Blog: The Standards Game
USB IP Blog: To USB or Not to USB
The Eyes Have it: An IP Blog
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Webinars
Manufacturing-Aware Routing at 32/28nm
Power Analysis using PrimeTime PX
Simulation of Power Devices with TCAD
The Next Generation of Ethernet
Realizing 32nm Large Capacity Designs
StarRC Custom Rapid3D Technology
Utilizing Design Compiler 2010 Technologies
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Events
ASQED (Asia Symposium on Quality Electronic Design) 2010
SNUG China
SNUG Singapore
SNUG Taiwan
SPIE Photomask Technology
SNUG Boston
SNUG Ottawa
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