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On Verification: A Software-to-Silicon
Exploring software-to-silicon verification.
Tom Borgstrom
Verification Methodology Blog : Verification Martial Arts
Technical information and tutorials focusing on functional verification.
Janick Bergeron
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HSPICE SIG EVENT
Hear what industry leaders say about using HSPICE in today’s most challenging designs
HSPICE TIPS WEBINAR
Reduce simulation time without compromising HSPICE gold-standard accuracy
VCS PRODUCTIVITY WEBINAR
Reducing the Growing Verification Cycle
EM/IR-DROP WEBINAR
Understand and Avoid Electromigration & IR-drop Effects in Custom IP Blocks
DAC 2011: VCS LUNCHEON VIDEOLOG
FastForward to Advanced Verification
News
Synopsys Collaborates with Sigrity to Accelerate Signal Integrity Analysis
eSilicon Selects Synopsys' Custom IC Design Solution and Tapes Out 28-nm Designs
LG Electronics Accelerates Analog Simulation by 10X with Synopsys CustomSim
Synopsys and GLOBALFOUNDRIES Collaborate to Deliver 65nm iPDKs
Synopsys Advances Mixed-Signal Verification with New CustomExplorer Ultra
CustomSim and VCS Solution Enables Fast Turnaround Time for SoC Verification
Synopsys CustomSim Selected by GSI Technology for High-Speed SRAM Simulation
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Articles
Techonomic Trends Drive Verification
Synopsys Introduces Discovery 2009
Synopsys Moves Tools to Multicore Hosts
Multicore, Mixed Signael Tools Take Center Stage
A Ticking Time Bomb
Static Checks for Power Management at RTL
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Blogs
On Verification: A Software-to-Silicon
Verification Methodology Blog : Verification Martial Arts
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Success Stories
Etron Achieves First-Silicon Success of USB3.0 SoC Using Synopsys Proven Solutions
Synopsys Helps SGI Drive High Performance Computing
Emulex Enhances Design Productivity With Synopsys’ Advanced Verification Solutions
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White Papers
MOS Device Aging Analysis with HSPICE and CustomSim
Understand and Avoid Electromigration (EM) & IR-drop in Custom IP Blocks
Using Digital Verification Techniques on Mixed-signal SoCs with CustomSim and VCS
Accelerating Analog Simulation with HSPICE Precision Parallel Technology
High-performance, Parallel Simulation with VCS Multicore Technology
Utilizing Digital Techniques for Analog and Mixed-Signal Verification
SystemVerilog for e-Experts
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Webinars
Get the Most from Your HSPICE Simulation
Avoid EM & IR-drop Effects in Custom IP Blocks
VCS Productivity - Reducing the Verification Cycle
New Advancements in Verification Methodology
Regression and Analysis for Mixed-Signal Verification
Jitter Analysis Using HSPICE Transient Noise Techniques
New Levels of Productivity for USB 3.0 Verification
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Videos
DAC 2011: SPICE Up Your Chip: Achieving Fast, Accurate AMS Verification
HSPICE SIG: A Converging Analog World: Silicon, Package and System
DAC 2009: Coping with Modern AMS Challenges
DAC 2009: Solutions for Tough Verification Challenges
VMM User Forum Lunch Event: ARM, Ltd.
VMM User Forum Lunch Event: Renesas Technology Corporation
VMM User Forum Lunch Event: NVIDIA
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