Transaction-Level Models
The Synopsys DesignWare® TLM Library provides product development teams a comprehensive set of standards-based, tool-independent, transaction-level models (TLMs) of DesignWare IP that serve as the building blocks of virtual prototypes. virtual prototypes are fully functional software models of complete embedded systems, enabling pre-RTL embedded software development and software-driven system validation. The ability to co-design hardware and software through virtual prototypes significantly reduces the product design cycle and speeds time-to-market. These TLM-2.0 LT (loosely timed) models also benefit from advanced debug and analysis capabilities when used with Synopsys’ architecture design tools.

These OSCI TLM-2.0-compliant models are written in SystemC™ to function with any IEEE 1666-compliant SystemC simulator. Mirroring the productivity gains realized by IP reuse in the implementation phase, the DesignWare TLM Library accelerates the development of virtual prototypes by providing pre-defined abstract models of hardware components in wireless, multimedia, networking and automotive application domains.

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Highlights

• Production-proven transaction-level models (TLM's), including:
• Synopsys DesignWare Interface IP models
• Synopsys DesignWare AMBA component models
• Written in SystemC to run with any IEEE 1666-compliant SystemC simulator
• TLM-2.0 compliant

Transaction-level models that are currently available in the DesignWare TLM Library include: