Introducing What's new in Design Compiler
Antun Domic, General Manager, Implementation Group, Synopsys, Inc

Amy Mitby introduces the latest release and highlights four new powerful features
Amy Mitby, Sr. Test Applications Consultant

Current trends are accelerating the need for pin-limited test. Amy Mitby introduces capabilities in DFTMAX compression that allows designers to achieve predictable compression of up to 100X or more with only one pair of test data pins.
Amy Mitby, Sr. Test Applications Consultant

Conventional compression tools create patterns that force the device under test to consume up to ten times more power compared to normal operation, leading to IR drop and overheating.
Tom Williams, Synopsys Fellow

Manufacturing process variations can introduce small delays that adversely affect critical design paths, leading to circuit failures. Dr. T.W. Williams introduces technology developed at Synopsys to detect defects creating these delays, thereby increasing the test quality.
Tom Williams, Synopsys Fellow

Design Compiler Graphical, the newest member of the Design Compiler product family, creates a better starting point for physical implementation and can shave weeks off your design schedule.
Antun Domic, senior vice president and general manager of Synopsys' Implementation Group

John Chilton, senior vice president of Marketing and Business Development at Synopsys, talks about the importance of utilizing today’s widely-available multi-core processor-based compute infrastructures to accelerate design TTR.
John Chilton, senior vice president of Marketing and Business Development at Synopsys