Location Proceedings

China 简体中文 Japan 日本语 United States English
International Office Locations

Home

Community

Synopsys Users Group

Location Proceedings

SNUG San Jose 2002 Proceedings

|

|

|

|

|

Sort proceedings by:

Tutorials

FA2

Physical Compiler Advanced Topics
Author(s):

FA3

Maximizing VCS Performance for SoC design
Author(s):

FA4

Transaction-Level Design (TLM) with CoCentric System Studio
Author(s):

FB2

Physical Synthesis Hierarchical Design Flow
Author(s):

FB3

Verification with OpenVera Assertions
Author(s):

FB4

Multi-level Mixed Signal Design Verification for High Performance SoC
Author(s):

WA1

Synthesis Highlights in DC2002.05
Author(s):

WA2

Introduction to Physical Compiler
Author(s):

WA3

A Verification Methodology Based on a Layered Approach
Author(s):

WA4

Test Synthesis and ATPG Methodologies for Large, Complex Designs
Author(s):

Speech

Guest Speaker

The Future of ASIC Design(ers)
Author(s): Steve Golson [Trilobyte Systems]

Keynote Address

Trust, Technology and Momentum
Author(s): Aart de Geus, Chairman and CEO [Synopsys, Inc.]

SNUG Welcomes
Virage Logic Users

Find a Local Conference

SNUG San Jose
Video Spotlight

Collaborating for Success
Rick Cassidy, President, TSMC North America

Best of SNUG Europe Webinar Series

Live Webinars - Register Now

Learn from the Best

2010 SNUG Award Winning Papers

Search SNUG Proceedings

© 2010 Synopsys, Inc. All Rights Reserved.