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Interoperability of Analog/Full-Custom Flows

• IPL Initiative Update
  Ed Lechner, Director, Product Marketing, Analog Mixed-Signal Group, Synopsys
  
• IPL Working Groups Updates
  
  • PCell Working Group
    James Roberts, Sr. Application Engineer, Silicon Canvas
  • Properties and Parameters Working Group
    Neel Gopalan, Application Engineer, Synopsys
  • Constraints Working Group
    James Roberts, Sr. Application Engineer, Silicon Canvas
• Live interoperability demo using the proof of concept Interoperable PCell Library (IPL)
  and OpenAccess Analog Symbol Library
  Features products from AWR, Ciranova, Mentor Graphics, Silicon Canvas, Silicon Navigator, and Synopsys
  
• Closing Remarks
  Ed Lechner, Director, Product Marketing, Analog Mixed-Signal Group, Synopsys
  
• IPL Showcase – Open discussion during lunch
  (no slides presented)
  

Integrating with VMM Methodology for SystemVerilog

• VMM: Proven Approach for Verification with SystemVerilog
  Mehdi Mohtashemi, Director, Verification Group, Synopsys
• Verdi & VMM: Components for SystemVerilog Testbench Success
  Dr. Ying-Tsai Chang, R&D Manager, Novas Software

General Session

• Welcome & Opening Remarks
  Rich Goldman, Vice President, Strategic Market Development, Synopsys
• Keynote - Low Power Design: The Third Revolution
  Michael Keating, Synopsys Fellow & Co-author of “Low Power Methodology Manual” (LPMM)
• Introducing the SOI Industry Consortium
  Tom Lantzsch, Treasurer, SOI Industry Consortium and VP of Marketing, ARM Physical IP
• Liberty UPF/Low Power Checklist
  Tom Chau, Group Director, CAE, Implementation Group, Synopsys
• Liberty Technical Advisory Board Updates
  Shirley Lu, Manager, R&D, Implementation Group, Synopsys

The Power of One: UPF on the Path to IEEE Ratification

• The Power of One: UPF on the Path to IEEE Ratification
  Yatin Trivedi, Director, Industry Partnership Programs, Magma Design Automation
• Getting Started with UPF/P1801 – A Technical Primer
  Jim Sproch, Senior Director of R&D, Synopsys
• Keeping Locals Local
  Judith Richardson, Methodology Manager, NXP Semiconductors

UPF Support Blitz

• Atrenta Support for Power Standards
  David Allen, Product Director, Power, Atrenta
• Managing Power: ARM Physical IP & The Power of One
  Leah Schuth, Technical Marketing Manager, ARM
• Verifying low power designs
  Tarak Parikh, VP. Products, AXIOM Design Automation
• Applying UPF Standards for Multi-Supply Flow Interoperability
  Marc Swinnen, Director of Product Marketing, Azuro, Inc.
• UPF Support for Low Power Implementation in Talus
  Krishna Devineni, Applications, Magma Design Automation
• UPF: Mentor's Support & Interoperability Plans
  Dennis Brophy, Director of Strategic Business Development, Mentor Graphics Corporation
• UPF support in Synopsys Products
  Mary Ann White, Marketing Director, Galaxy Power, Synopsys
• Moving Forward with Power Formats
  Oscar Siguenza, Director of Platform Infrastructure, Virage Logic
• Ask the Experts – Open discussion on UPF
  (no slides presented)