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Overview
The Synopsys® DesignWare® Mobile Storage Host Controller IP core addresses the growing storage need for handheld and consumer electronics applications requiring low power such as mp3 players, smart phones and PDAs.
The silicon-proven, mobile storage core is a comprehensive IP solution designed for system-on-chip (SoC) integration and optimized for low power, high performance storage devices.
The architecture and coding style of the DesignWare Mobile Storage Host core is built on power management techniques, making it ideal for low-power applications.
Many modules can be optimized out of the design to reduce gate count and power consumption. Moreover, gated flops are used to ensure that only the necessary logic is activated for any given transaction.
A rigorous verification methodology was applied to the DesignWare Mobile Storage Host core, consisting of directed tests, constrained random verification, and FPGA hardware verification.
The core's FPGA development board was tested with all major memory SD cards, SDIO commands and MMC cards. It has also been implemented in customer silicon and shipping in volume.
Highlights
- Supports the SD 2.00, SDIO1.1; MMC 4.2 and CE-ATA 1.1 specifications
- Supports a Descriptor based DMA with AMBA 2.0 AHB interface
- Command completion signal disable for CE-ATA
- Command Completion Signal disable CRC generation and checking in CE-ATA mode
- CE-ATA VMT models
- SD_MMC mode supports 1-bit, 4-bit and 8-bit cards
- Low-power system option with individual clock and power ON/OFF features to each card
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