Overview
Physical implementation in the Galaxy™ Design Platform provides an industry-leading, production-proven solution for physical design.

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DAC 2008: Latest IC Compiler Technology Drives Customer Success Intel, STMicroelectronics, Toshiba and ARM share their experiences on high-end designs utilizing the latest technology advances in IC Compiler: Concurrent Hierarchical Design, MinChip technology, DFM and the newly announced Zroute.

»Play Video        06:31

DAC 2008: Zroute: New Routing Technology in IC Compiler Architected from the ground up, new Zroute technology offers 10X speed-up, higher QoR, and better manufacturability. Stephen Meier, vice president of Engineering for Synopsys' Implementation Group , shared more details during the DAC 2008 IC Compiler Luncheon event.

»Play Video        02:40

10X Faster Routing Runtime Combine advanced routing algorithms with multi-threading technology, and you get a speed increase of >10X on quad-core machines. Tong Gao, Synopsys Scientist and architect of Zroute, provides some insight.

Key Benefits

• High throughput for designs in mainstream silicon technologies
• High performance for advance silicon technologies
• Comprehensive optimization capability: Area, Timing, Test, Power and Yield
• Standard input/output interfaces:
• Netlist input: database or ASCII
• GDSII out
• Milkyway libraries
• IC Compiler for implementation and concurrent hierarchical design
• Highly correlated with golden sign-off: PrimeTime® and Star-RCXT™
• Optimized for best performance and predictability used with Design Compiler®

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