System Studio - Archive

Press Releases

• Synopsys Adds 30 New Titles to DesignWare System-Level Library
• Synopsys Announces DesignWare System-Level Library
• Sequans Standardizes on Synopsys VCS, System Studio and Formality Solutions for Verification

Articles

• Software Rules The Day In Multicore SoC Design
• Model Workers
• Panelists clash over virtual platform standards
• Transaction-Level Modeling: SystemC and/or SystemVerilog
• SCDsource: Synopsys pledges multicore support for EDA applications
• Virtual Prototypes Cut Software Bottleneck
• Fast virtual platforms open up multicore software development
• Mixed-level modeling allows IC virtual prototypes
• Future Verification Appears Uncertain
• Ten 2008 trends in system and chip design
• Virtual platforms – a reality check, part 2
• Spotty Connections in Wireless
• System level design is here, Synopsys CTO says
• Synopsys and Virtio: Already the most important EDA move for 2004
• EEDesign.com: Going virtual speeds SoCs
• Synopsys and Virtio: Already the most important EDA move for 2004
• EEDesign.com: Going virtual speeds SoCs
• Synopsys adds tools for software
• ESL-based flow eases complex SoC design
• Designing Multistandard Communication Devices
• Addressing System-Level Challenges in High-Speed Communication Chips
• WCDMA Baseband Design Faces Challenges
• Synopsys tips system-level co-verification

For more information about this product, please contact your local Synopsys representative or call 1-800-388-9125.