Overview
System Studio is the high performance model-based algorithm design and analysis tool, combining unmatched simulation performance and highest modeling efficiency, plus industry's best integration into the implementation design and verification flow. Algorithm design is an essential task in signal processing applications such as wireless telephony, multimedia codecs, DSL and cable modems. More than 50% of all mobile phones worldwide rely on algorithms designed with System Studio, making it the clear market leader.
Figure 1: System Studio's model-based design concept provides highest design efficiency by
providing a development environment with both graphical and language abstractions that
capture the entire system in a hierarchical fashion
Design Challenges
The design of Signal Processing Algorithms is a key discipline in order to come up with differentiating products, as the algorithm defines the performance and functionality. Algorithm designers must quickly and easily define the mathematical function that is able to meet the requirements. Depending on the final implementation architecture in either hardware or software, they need to move all the way to a bit-true fixed-point specification, to make sure that quantization effects are taken into consideration when analyzing the algorithm's suitability.
Solution
System Studio addresses this design challenge by providing a powerful, model-based electronic system-level (ESL) design creation, simulation and analysis environment, for algorithms that is tightly integrated within the Synopsys Discovery™ Verification Platform. System Studio provides extensive support for the design and analysis of complex signal processing functions such as multi-antenna receiver algorithms, multimedia processing, and communication standards compliance. It offers a rich set of analysis functions that designers use to meet the requirements for high-quality user experience with speech, multimedia, and Internet connectivity given the imperfections introduced by transmission, non-ideal analog components, and fixed-point digital implementation. Its unique dataflow simulation engine provides highest simulation performance necessary to explore the design space in an acceptable amount of time.
Its fixed point simulation acceleration concepts set it apart from any other solution, achieving a speed improvement of 10x for typical mixed floating-point/fixed-point simulation and up to 200x for fixed-point only simulation.
System Studio's intuitive graphical user interface and extensive model libraries and reference design kits (RDKs) jump-start commercial design efforts in the areas of advanced wireless, multimedia and telecom technical standards. Automatic Verilog generation, from fixed-point models of these algorithms, ensure a fast path to synthesizable RTL and silicon.
System Studio's fast performance on single simulation runs is enhanced on compute clusters, taking advantage of multicore architectures, by its native capability to distribute simulation iteration runs to multiple processing elements, then merging the simulation results into a comprehensive report.
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Figure 2: Analysis and Debugging, supported by powerful data visualization capabilities
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- Key Benefits and Features
- Model-based Design
- More than 2000 signal-processing models, from simple to very complex
- Easy-to-use, unified development environment with both graphical and language abstractions that capture the entire system in a hierarchical fashion
- Easy integration of existing functions written in C / C++
- Fixed-point modeling based on standard IEEE 1666 SystemC fixed-point data types
- Unique range of modeling styles: single rate, multi-rate and dynamic dataflow, extended finite state machines
- Native SystemC language support
- Automatic documentation generation that can serve as specification for later design steps, guarantees consistency between simulation model and paper documentation
- Simulation Performance
- Compiled Simulation
- Stream-Driven Simulation™, vector-based processing of static and dynamic dataflow
- Ultra-fast fixed-point simulation, achieving up to 200x over the OSCI proof-of-concept implementation
- Enabling industry's fastest simulation and analysis of signal-processing algorithms
- Unmatched capacity, enabling simulation of your most complex signal processing applications
- Support to distribute simulations to your compute cluster, taking advantage of the multicore CPU of your installed compute infrastructure
- Analysis and Debugging
- Powerful scripting capabilities
- Automatic design checks to detect data rate and data type mismatches prior to any simulation run
- Simulation profiler to enable
- Block and source code debugging
- Powerful data visualization, both interactive and post-processing, including dedicated views
- Design Flow Integration
- SystemC export of algorithm subsystems, for integration into any SystemC-based simulation environment
- Automatic HDL code generation directly from your algorithm description, with no need for maintaining parallel libraries
- Automated co-simulation setup with all major RTL simulation tools, allows easy integration of VHDL and Verilog into the system level simulation
- Slavable simulation interface, allows to plug System Studio into the simulation environment of your choice
Related Products
For more information about this product, please contact your local Synopsys representative
or call 1-800-388-9125.
Back to System-Level Solutions.
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