Overview
As IC designs move toward silicon geometries of 65-nm and below, a myriad of new challenges emerge that impact design predictability and reduce the probability of silicon success. Design success becomes more difficult at these smaller geometries, which makes the need for sign-off solutions even more important. Sign-off is critical to design success because sign-off solutions accurately model and predict silicon behavior. Accurate sign-off analysis on designs helps pinpoint problems prior to manufacturing, thereby reducing risk, ensuring design integrity, and lowering the cost of design.
Complete sign-off solutions require HSPICE® and silicon accuracy; full-chip performance and capacity; support for 90-, 65-, and 45-nm effects; and analysis of a full range of other silicon effects, including timing, signal integrity, power, voltage drop, electromigration, parasitic extraction, and process variation.
The Synopsys Galaxy™ Design Platform delivers the industry’s most comprehensive sign-off solution to ensure first-pass silicon success with greater predictability and higher productivity. Anchored by the industry’s gold-standard PrimeTime® static timing analysis and Star-RCXT™ parasitic extraction solutions, Galaxy sign-off encompasses timing analysis, signal integrity, power analysis, rail analysis, electromigration analysis, parasitic extraction, and variation-aware analysis.
Sign-Off Solutions
The Synopsys PrimeTime suite, which includes PrimeTime SI, PrimeTime PX, and PrimeTime VX solutions, is the industry’s gold standard for timing analysis and delivers a single, comprehensive sign-off environment for timing, signal integrity, power, and variation-aware analysis.
Star-RCXT is the industry’s gold standard for parasitic extraction. Star-RCXT VX delivers sensitivity-based parasitic extraction used in conjunction with the PrimeTime VX solution for variation-aware and statistical analysis of designs at 65nm and below.
PrimeRail delivers full-chip, dynamic voltage-drop and electromigration (EM) analysis for power network sign-off NanoTime is a next-generation transistor-level static timing analysis and signal integrity analysis solution for custom digital designs.
Back to Galaxy Design Platform
|
